{"id":6142,"date":"2023-02-13T12:59:02","date_gmt":"2023-02-13T03:59:02","guid":{"rendered":"https:\/\/solid.kmckk.com\/SOLID\/?p=6142"},"modified":"2023-02-14T11:13:41","modified_gmt":"2023-02-14T02:13:41","slug":"solid%e4%bd%bf%e3%81%a3%e3%81%a6%e3%81%bf%e3%82%88%e3%81%86%e3%82%b7%e3%83%aa%e3%83%bc%e3%82%ba3-%e3%80%8c%e3%82%b3%e3%83%bc%e3%83%89%e3%82%ab%e3%83%90%e3%83%ac%e3%83%83%e3%82%b8%e3%80%8d-2-5-2-2-2-8","status":"publish","type":"post","link":"https:\/\/solid.kmckk.com\/SOLID\/archives\/6142","title":{"rendered":"SOLID for Raspberry Pi 4 (\u9023\u8f0915)"},"content":{"rendered":"
\n
\n\t

(2023\/2\/13)<\/p>\n<\/div>\n<\/div><\/div>

Rust\u3067SPI\u30c7\u30fc\u30bf\u53d7\u4fe1\u2015\u6709\u8b58\u8005\u30ec\u30d3\u30e5\u30fc\u3068\u30af\u30ec\u30fc\u30c8\u5316<\/h3>\n
\n\t

\u524d\u56de\u66f8\u3044\u305f\u30b5\u30f3\u30d7\u30eb\u30d7\u30ed\u30b0\u30e9\u30e0\u3084\u8a18\u4e8b\u3092\u3001\u6709\u8b58\u8005\u306e\u65b9\u306b\u30c1\u30a7\u30c3\u30af\u3044\u305f\u3060\u304d\u307e\u3057\u305f\u3002<\/p>\n

\u305d\u306e\u30d5\u30a3\u30fc\u30c9\u30d0\u30c3\u30af\u306e\u5185\u5bb9\u306b\u3064\u3044\u3066\u66f8\u304d\u307e\u3059\u3002<\/p>\n

\u3055\u3089\u306b\u3001\u52a0\u901f\u5ea6\u30bb\u30f3\u30b5ADXL345\u5236\u5fa1\u90e8\u3092\u30af\u30ec\u30fc\u30c8\u5316\u3057\u3066\u304a\u3053\u3046\u3068\u601d\u3044\u307e\u3059\u3002<\/p>\n

 <\/p>\n

 <\/p>\n<\/div>\n<\/div><\/div>

\uff11\uff0e\u6709\u8b58\u8005\u30ec\u30d3\u30e5\u30fc\u7d50\u679c<\/h3>\n
\n\t

1.1 \u5f15\u6570\u578b\u306f\u610f\u5473\u306b\u5373\u3057\u305f\u578b\u3092\u4f7f\u7528\u3059\u308b\u3053\u3068<\/h3>\n

\u4f8b\u3048\u3070\u52a0\u901f\u5ea6\u30bb\u30f3\u30b5ADXL345\u306e\u30ec\u30b8\u30b9\u30bf\u306b\u66f8\u304d\u8fbc\u3080\u4ee5\u4e0b\u306e\u95a2\u6570\u306b\u3064\u3044\u3066\u3001\u898b\u3066\u307f\u307e\u3059\u3002<\/p>\n

pub fn regwrite(regaddr: u32, writeval: u32)<\/p>\n

--------- [\u6307\u6458\u5185\u5bb9]---------
\n\u610f\u5473\u306b\u5373\u3057\u305f\u578b\u3092\u4f7f\u7528\u3059\u308b\u306e\u304c\u6163\u7fd2\u7684\u3067\u3059\u3002\u4f8b\u3048\u3070\u3001ADXL345\u306e\u30ec\u30b8\u30b9\u30bf\u30a2\u30c9\u30ec\u30b9\u3068\u5024\u306f\u305d\u308c\u305e\u308c8\u30d3\u30c3\u30c8\u5e45\u306a\u306e\u3067\u3001u8\u304c\u5f15\u6570\u578b\u306b\u306a\u308a\u307e\u3059\u3002
\n--------------------------------<\/p>\n

\u3053\u3053\u3067\u7b46\u8005\u304c\u306a\u305cu32\u306b\u3057\u305f\u304b\u3068\u3044\u3046\u3068\u3001\u3053\u308c\u306fBCM2711\u30c1\u30c3\u30d7\u306e\u5185\u8535I\/O\u3067\u3042\u308b SPI\u306eFIFO\u30ec\u30b8\u30b9\u30bf\u306b\u66f8\u304d\u8fbc\u3080\u30c7\u30fc\u30bf\u3067\u3042\u308a\u3001\u305d\u306eFIFO\u30ec\u30b8\u30b9\u30bf\u306e\u30b5\u30a4\u30ba\u304c32\u30d3\u30c3\u30c8\u3060\u304b\u3089\u3067\u3059\u3002
\nCargo\u30d1\u30c3\u30b1\u30fc\u30b8\u300cbcm2711_pac\u300d\u306b\u542b\u307e\u308c\u308b\u30e9\u30a4\u30d6\u30e9\u30ea\u30af\u30ec\u30fc\u30c8<\/a>\u306b\u4ee5\u4e0b\u306e\u3088\u3046\u306b\u5b9a\u7fa9\u3055\u308c\u3066\u3044\u307e\u3059\u3002<\/p>\n

\n
\nregister_bitfields! {u32,\n    pub FIFO [\n        \/\/\/ Read from RX FIFO or write to TX FIFO\n        \/\/\/\n        \/\/\/ *DMA Mode (`DMAEN` set):* If `TA` is clear, the first 32-bit write\n        \/\/\/ to this register will control `SPIDLEN` and `SPICS`. Subsequent\n        \/\/\/ reads and writes will be taken as four-byte data words to be read\n        \/\/\/ or written to the FIFOs.\n        \/\/\/\n        \/\/\/ *Poll\/Interrupt Mode (`DMAEN` clear, `TA` set):* Writes to the\n        \/\/\/ register write bytes to the TX FIFO. Reads from the register read\n        \/\/\/ bytes from the RX FIFO.\n        DATA OFFSET(0) NUMBITS(32) [],\n    ]\n}\n<\/code><\/pre>\n<\/div>\n
 <\/p>\n
u32\u3067\u3059\u306d\u3002<\/p>\n
\u3059\u306a\u308f\u3061\u3001\u7b46\u8005\u306f\u30a2\u30af\u30bb\u30b9\u5148\u306e\u30ec\u30b8\u30b9\u30bf\u30b5\u30a4\u30ba\u3068\u540c\u3058\u30b5\u30a4\u30ba(u32)\u306b\u3057\u307e\u3057\u305f\u3002
\n\u3057\u304b\u3057\u305d\u3046\u3067\u306f\u306a\u304f\u3001\u4f7f\u3044\u9053\u306b\u5373\u3057\u305f\u578b\u306b\u3059\u308b\u3053\u3068\u304c\u6163\u7fd2\u3060\u3068\u306e\u4e8b\u3067\u3057\u305f\u3002<\/p>\n
\u4eca\u56de\u306fFIFO\uff13\uff12\u30d3\u30c3\u30c8\u5206\u3059\u3079\u3066\u4f7f\u7528\u3059\u308b\u308f\u3051\u3067\u306f\u3042\u308a\u307e\u305b\u3093\u3002
\n\u7406\u7531\u306fADXL345\u306e\u30ec\u30b8\u30b9\u30bf\u30a2\u30c9\u30ec\u30b9\u304c8\u30d3\u30c3\u30c8\u3001\u5024\u3082\uff18\u30d3\u30c3\u30c8\u3060\u304b\u3089\u3067\u3059\u3002
\n8\u30d3\u30c3\u30c8\u5206\u62bc\u3057\u51fa\u305b\u3070\u6e08\u307f\u307e\u3059\u3002<\/p>\n
\u3057\u305f\u304c\u3063\u3066\u3001\u3053\u3053\u306fu8\u3068\u3057\u307e\u3059\u3002<\/p>\n
\u3057\u304b\u3057\u305d\u3046\u3059\u308b\u3068\u3001\u554f\u984c\u304c\u51fa\u3066\u304d\u307e\u3059\u3002
\n\u5148\u8ff0\u306e\u901a\u308a\u3001FIFO\u306e\u30ec\u30b8\u30b9\u30bf\u306f32\u30d3\u30c3\u30c8\u30a2\u30af\u30bb\u30b9\u3067\u3059\u3002<\/p>\n
\u3053\u308c\u306b\u3064\u3044\u3066\u3082\u3001\u30a2\u30c9\u30d0\u30a4\u30b9\u9802\u304d\u307e\u3057\u305f\u3002<\/p>\n
--------
\nu8 -> u32\u306f\u7121\u640d\u5931\u5909\u63db\u306a\u306e\u3067\u3001\u201c.into()\u201d \u3067\u5909\u63db\u3067\u304d\u307e\u3059\u3002
\n\u4f8b:
\nspi::FIFO::DATA.val(writeval.into()));
\n--------<\/p>\n
\u3075\u3080\u3075\u3080\u3002
\n\u201c.into()\u201d\u3000\u306f\u3001\u7d44\u307f\u8fbc\u307f\u3067\u306f\u3044\u308d\u3044\u308d\u51fa\u3066\u304d\u305d\u3046\u3067\u3059\u306d\u3002
\n\u8981\u30c1\u30a7\u30c3\u30af\u3067\u3059\u3002<\/p>\n
\u540c\u3058\u3053\u3068\u306f\u53d7\u4fe1\u95a2\u6570\u306b\u3082\u8a00\u3048\u307e\u3059\u3002
\n-----
\npub fn regread(regval: u32) -> i32 {
\n------<\/p>\n
\u5f15\u6570\u306fu8\u306b\u3057\u307e\u3057\u3087\u3046\u3002
\n\u623b\u308a\u5024\u306fi32\u3001\u3053\u306e\u307e\u307e\u3067\u3002
\n-----
\npub fn regread(regval: u8) -> i32 {
\n------<\/p>\n
\u305d\u3057\u3066FIFO\u306e\u30a2\u30af\u30bb\u30b9\u3082\u540c\u69d8\u306b\u201c.into()\u201d \u3067\u5909\u63db\u3002<\/p>\n
\u2015\u2015\u2015
\n\/\/(3)FIFO\u306b\u9001\u4fe1\u30c7\u30fc\u30bf\u3092\u66f8\u304f\uff08\u9001\u4fe1\u30c7\u30fc\u30bf\uff1a\u30e9\u30a4\u30c8\u5bfe\u8c61\u306e\u52a0\u901f\u5ea6\u30bb\u30f3\u30b5\u306e\u30ec\u30b8\u30b9\u30bf\u5024\uff09
\nspi_regs().fifo.write(spi::FIFO::DATA.val(regval.into()));
\n\u2015\u2015\u2015<\/p>\n
\u3053\u308c\u3067\u5b8c\u4e86\u3002<\/p>\n
1.2 \u578b\u5909\u63db<\/h3>\n
\u53d7\u4fe1\u90e8\u306e\u6700\u5f8c\u3001\u7b26\u53f7\u4ed8\u306b\u5909\u63db\u3057\u305f\u308a\u578b\u5909\u63db\u3057\u305f\u308a\u3057\u3066\u3044\u308b\u90e8\u5206\u304c\u3042\u308a\u307e\u3059\u3002<\/p>\n
\n
        retdata = i32::try_from(retdata_l | (retdata_h << 8)).unwrap();\n        if (retdata & 0x8000) != 0x0000 {\n            retdata = (!retdata & 0xFFFF) + 1;\n            retdata = 0 - retdata;\n        }<\/code><\/pre>\n<\/div>\n
\u3053\u3053\u3001\u306a\u3093\u3068\u4e00\u884c\u3067\u66f8\u3051\u3066\u3057\u307e\u3044\u307e\u3057\u305f\uff01<\/p>\n
 <\/p>\n[\u30dd\u30a4\u30f3\u30c8\uff11]\nFIFO\u304b\u3089\u8aad\u3093\u3067\u304d\u305fretdata_l\u3068retdata_h, u32\u3060\u304cu8\u3068\u3057\u3066\u6271\u3044\u3001\u3055\u3089\u306b\u305d\u308c\u3089\u3092from_le_bytes\u3092\u7528\u3044\u3066\u4e0b\u4f4d\u5074\u304b\u3089\u8a70\u3081\u3066\u3044\u304f\u3002
\n\u53c2\u8003\uff1ahttps:\/\/doc.rust-lang.org\/std\/primitive.u32.html#method.from_le_bytes<\/a><\/p>\n[\u30dd\u30a4\u30f3\u30c8\uff12]\ni16 -> i32\u306f\u7121\u640d\u5931\u5909\u63db\u306a\u306e\u3067\u3001\u201c.into()\u201d \u307e\u305f\u306f \u201cu32::from( \u2026 )\u201d \u3067\u5909\u63db\u3067\u304d\u308b\u3002<\/p>\n
\u3057\u305f\u304c\u3063\u3066\u3001\u4ee5\u4e0b\u306e\u4e00\u884c\u306b\u306a\u308a\u307e\u3057\u305f\u3002
\nretdata =i32::from(i16::from_le_bytes([retdata_l as u8, retdata_h as u8]));<\/p>\n
 <\/p>\n
1.3 return\u4e0d\u8981<\/h3>\n
\u53d7\u4fe1\u95a2\u6570\u306e\u6700\u5f8c\u306ereturn\u306f\u4e0d\u8981\u3067\u3059\u3002
\n\uff08\u3068\u3001\u904e\u53bb\u306e\u8a18\u4e8b\u306b\u66f8\u304d\u307e\u3057\u305f\u3002\u81ea\u5206\u3067\u3002\u3002\u3002\uff09<\/p>\n
https:\/\/note.com\/yn_2022\/n\/nf64d5d2b3547#d3706e78-c097-4c12-be4d-941c174e2f63<\/a><\/p>\n
\u300cRust\u3067\u306f\u3001return\u6587\u304c\u306a\u304f\u3066\u3082\u3001\u6700\u5f8c\u306e\u5f0f\u306e\u5024\u304c\u623b\u308a\u5024\u306b\u306a\u308a\u307e\u3059\u3002\u300d<\/p>\n
\n
retdata = i32::from(i16::from_le_bytes([retdata_l as u8, retdata_h as u8]));\nreturn retdata;<\/code><\/pre>\n<\/div>\n
\u3068\u3044\u3046\u4e8b\u3067\u3001return\u3092\u524a\u9664\u3057\u3001\u5f0f\u306b\u3057\u307e\u3059\u3002<\/p>\n
\n
i32::from(i16::from_le_bytes([retdata_l as u8, retdata_h as u8]));<\/code><\/pre>\n<\/div>\n
\u30d3\u30eb\u30c9\u30a8\u30e9\u30fc\u304c\u51fa\u307e\u3057\u305f\u3002<\/p>\n
\"\"<\/a><\/p>\n
\u30bb\u30df\u30b3\u30ed\u30f3\u304c\u3042\u308b\u3068\u3001\u300c\u5f0f\u300d\u3067\u306f\u306a\u3044\u305d\u3046\u3067\u3059\u3002
\n\u306a\u306e\u3067\u3001\u30bb\u30df\u30b3\u30ed\u30f3\u306f\u524a\u9664\u3057\u3001\u7121\u4e8b\u3001\u30d3\u30eb\u30c9\u304c\u901a\u308a\u307e\u3057\u305f\u3002<\/p>\n[\u6ce8] 2\/14\u88dc\u8db3
\n\u30fb\u30d6\u30ed\u30c3\u30af\u4e2d\u306e\u6700\u5f8c\u306e\u30b9\u30c6\u30fc\u30c8\u30e1\u30f3\u30c8\u306e\u5f8c\u306b\u5f0f\u304c\u3042\u308b\u5834\u5408\u3001\u305d\u308c\u304c\u30d6\u30ed\u30c3\u30af\u306e\u5024\u306b\u306a\u308b
\n\u30fb\u30bb\u30df\u30b3\u30ed\u30f3\u7d42\u7aef\u3055\u308c\u305f\u5f0f\u306f\u300c\u5f0f\u30b9\u30c6\u30fc\u30c8\u30e1\u30f3\u30c8<\/a>\u300d\u3068\u3044\u3046\u6271\u3044\u306b\u306a\u308a\u3001\u30b9\u30c6\u30fc\u30c8\u30e1\u30f3\u30c8\u306b\u306a\u308b\u305f\u3081\u3001\u30ea\u30bf\u30fc\u30f3\u5024\u3092\u8fd4\u3059\u306b\u306f\u305d\u306e\u5f8c\u306b\u5f0f\u304c\u5fc5\u8981\u3002<\/p>\n
\u30bd\u30fc\u30b9\u30b3\u30fc\u30c9\u306f\u6700\u5f8c\u306b\u307e\u3068\u3081\u3066\u66f8\u304d\u307e\u3059\u3002<\/p>\n
 <\/p>\n<\/div>\n<\/div><\/div><\/div><\/div>
\uff12\uff0e\u30af\u30ec\u30fc\u30c8\u5316<\/h3>\n
\n\t
\u9023\u8f09\uff18\u3067\u30af\u30ec\u30fc\u30c8\u5316\u3092\u8a66\u3057\u3066\u307f\u307e\u3057\u305f\u3002<\/p>\n
https:\/\/note.com\/yn_2022\/n\/nf9851aff3f18<\/a><\/p>\n
\u3053\u306e\u7d4c\u9a13\u3092\u7528\u3044\u3066\u3001\u52a0\u901f\u5ea6\u30bb\u30f3\u30b5ADXL345\u5236\u5fa1\u90e8\u3092\u30af\u30ec\u30fc\u30c8\u5316\u3057\u3066\u307f\u307e\u3059\u3002<\/p>\n
\u4eca\u3001\u4ee5\u4e0b\u4e8c\u3064\u306e\u30e2\u30b8\u30e5\u30fc\u30eb\u304c\u3042\u308a\u307e\u3059\u3002<\/p>\n
mod spi_gpio_control
\nmod spi_control<\/p>\n
\u3053\u308c\u3089\u3001mod spi_control\u306b\u7d71\u4e00\u3057\u3001\u305d\u3057\u3066\u30af\u30ec\u30fc\u30c8\u300cspi_adxl345\u300d\u3092\u4f5c\u308b\u3053\u3068\u306b\u3057\u307e\u3059\u3002<\/p>\n
\u4f5c\u6210\u306e\u65b9\u6cd5\u306f\u3001\u9023\u8f09\uff18\u3067\u66f8\u3044\u305f\u3053\u3068\u3068\u4f55\u3089\u5909\u308f\u3089\u306a\u3044\u306e\u3067\u3001\u7701\u7565\u3057\u307e\u3059\u3002<\/p>\n
 <\/p>\n<\/div>\n<\/div><\/div>
\uff13\uff0e\u52d5\u304b\u3057\u3066\u307f\u308b<\/h3>\n
\n\t
\u5909\u308f\u3089\u305a\u52d5\u304d\u307e\u3057\u305f\u3002<\/p>\n
\"\"<\/a><\/p>\n
 <\/p>\n<\/div>\n<\/div><\/div>
\uff14\uff0e\u30bd\u30fc\u30b9\u30b3\u30fc\u30c9<\/h3>\n
\n\t
\u30bd\u30fc\u30b9\u30b3\u30fc\u30c9\u306f\u3053\u3046\u306a\u308a\u307e\u3057\u305f\u3002<\/p>\n
ADXL345\u30bb\u30f3\u30b5\u5236\u5fa1\u90e8\u3092\u30af\u30ec\u30fc\u30c8\u5316\u3057\u305f\u306e\u3067\u3001\u3059\u3063\u304d\u308a\u3057\u307e\u3057\u305f\u3002<\/p>\n
4.1 \u30e1\u30a4\u30f3\u90e8<\/h3>\n
\n
use itron::{task::delay, time::duration};\n\n#[no_mangle]\npub extern \"C\" fn slo_main() {\n    const BW_RATE: u8 = 0x2c;\n    const BW_RATE_VAL: u8 = 0x0b;\n    const DATA_FORMAT: u8 = 0x31;\n    const DATA_FORMAT_VAL: u8 = 0x0B; \/\/(4 mg\/LSB +-16g)\n    const POWER_CTL: u8 = 0x2D;\n    const POWER_CTL_VAL: u8 = 0x08;\n\n    println!(\"Starting SPI control.\");\n\n    spi_adxl345::init();\n\n    \/\/ADXL345_init\n    spi_adxl345::regwrite(BW_RATE, BW_RATE_VAL);\n    spi_adxl345::regwrite(DATA_FORMAT, DATA_FORMAT_VAL);\n    spi_adxl345::regwrite(POWER_CTL, POWER_CTL_VAL);\n\n\tloop{\n    \/\/\u9023\u7d9a\u8907\u6570\u30ea\u30fc\u30c9\u3092\u884c\u3046\u3002-> 0xc0\u3068OR\u3092\u3068\u308b\u3002\n\t \/\/0.0392266=(4\/1000*9.80665)\n\n\t\tlet x_axis = spi_adxl345::regread(0xc0 | 0x32) as f32 * 0.0392266;\n\t\tlet y_axis = spi_adxl345::regread(0xc0 | 0x34) as f32 * 0.0392266;\n\t\tlet z_axis = spi_adxl345::regread(0xc0 | 0x36) as f32 * 0.0392266;\n\n\t\tprintln!(\"x_axis:{} y_axis:{} z_axis:{}\", x_axis, y_axis, z_axis);\n\n\t\tdelay(duration!(ms: 500)).unwrap(); \/\/500ms\u5f85\u3064\n\t}\n}\n<\/code><\/pre>\n<\/div>\n
 <\/p>\n
4.2 \u30af\u30ec\u30fc\u30c8\u90e8<\/h3>\n
\n
\nuse bcm2711_pac::gpio;\nuse bcm2711_pac::spi;\nuse tock_registers::interfaces::{ReadWriteable, Readable, Writeable};\n\nfn gpio_regs() -> &'static gpio::Registers {\n    \/\/ Safety: SOLID for RaPi4B provides an identity mapping in this area, and we don't alter\n    \/\/ the mapping\n    unsafe { &*(gpio::BASE.to_arm_pa().unwrap() as usize as *const gpio::Registers) }\n}\n\nfn spi_regs() -> &'static spi::Registers {\n    \/\/ Safety: SOLID for RaPi4B provides an identity mapping in this area, and we don't alter\n    \/\/ the mapping\n    unsafe { &*(spi::BASE_SPI0.to_arm_pa().unwrap() as usize as *const spi::Registers) }\n}\n\nfn gpio_init() {\n    for pin in 8..=11 {\n        gpio_regs().gpfsel[pin \/ gpio::GPFSEL::PINS_PER_REGISTER].modify(\n            gpio::GPFSEL::pin(pin % gpio::GPFSEL::PINS_PER_REGISTER).val(gpio::GPFSEL::ALT0),\n        );\n    }\n}\n\npub fn init() {\n    const CLKSET: u32 = 0x00cb;\n\n    gpio_init();\n\n    \/\/SPI\u306eCLK\u30ec\u30b8\u30b9\u30bf\u306bSPI\u5468\u6ce2\u6570\u3092\u8a2d\u5b9a\n    spi_regs().clk.write(spi::CLK::CDIV.val(CLKSET));\n\n    \/\/CS : 00 = Chip select 0  -> CS.bit0 and 1\n    \/\/CPOL: Clock Polarity 1 = Rest state of clock = High -> CS.bit3\n    \/\/CPHA: Clock Phase 1 = First SCLK transition at beginning of data bit. -> CS.bit2\n    spi_regs().cs.modify(spi::CS::CS::ChipSelect0);\n    spi_regs().cs.modify(spi::CS::CPOL::RestStateIsHigh);\n    spi_regs()\n        .cs\n        .modify(spi::CS::CPHA::FirstSclkTransitionAtBeginningOFDataBit);\n}\n\npub fn regwrite(regaddr: u8, writeval: u8) {\n    \/\/(1)CS\u30ec\u30b8\u30b9\u30bf\u306eTA\u30d3\u30c3\u30c8\u30921\u306b\u3059\u308b\u3002\n    spi_regs().cs.modify(spi::CS::TA::SET);\n\n    \/\/(2)FIFO\u306b\u9001\u4fe1\u30c7\u30fc\u30bf\u3092\u66f8\u304f\uff08\u9001\u4fe1\u30c7\u30fc\u30bf\uff1a\u30e9\u30a4\u30c8\u5bfe\u8c61\u306e\u52a0\u901f\u5ea6\u30bb\u30f3\u30b5\u306e\u30ec\u30b8\u30b9\u30bf\u5024\uff09\n    spi_regs().fifo.write(spi::FIFO::DATA.val(regaddr.into()));\n\n    \/\/(3)CS\u30ec\u30b8\u30b9\u30bf\u306eTXD\u30d3\u30c3\u30c8\u304c1\u306b\u306a\u308b\u307e\u3067\u5f85\u3064\n    while !spi_regs().cs.is_set(spi::CS::TXD) {}\n\n    \/\/(4)FIFO\u306b\u9001\u4fe1\u30c7\u30fc\u30bf\u3092\u66f8\u304f\uff08\u9001\u4fe1\u30c7\u30fc\u30bf\uff1a\u5148\u307b\u3069\u306e\u30ec\u30b8\u30b9\u30bf\u3078\u306e\u30e9\u30a4\u30c8\u5024\uff09\n    spi_regs().fifo.write(spi::FIFO::DATA.val(writeval.into()));\n\n    \/\/(5)CS\u30ec\u30b8\u30b9\u30bf\u306eDONE\u30d3\u30c3\u30c8\u304c1\u306b\u306a\u308b\u307e\u3067\u5f85\u3064\n    while !spi_regs().cs.is_set(spi::CS::DONE) {}\n\n    \/\/(6)CS\u30ec\u30b8\u30b9\u30bf\u306eCLEAR\u30d3\u30c3\u30c8\u306b0x01\u3092\u66f8\u3044\u3066FIFO\u30af\u30ea\u30a2\n    spi_regs().cs.modify(spi::CS::CLEAR_TX::SET);\n\n    \/\/(7)CS\u30ec\u30b8\u30b9\u30bf\u306eTA\u30d3\u30c3\u30c8\u30920\u306b\u3057\u3066\u9001\u4fe1\u5b8c\u4e86\u3002\n    spi_regs().cs.modify(spi::CS::TA::CLEAR);\n}\n\n\/\/TODO: \u30a8\u30e9\u30fc\u51e6\u7406\u306f\u4eca\u56de\u306f\u8003\u3048\u305a\u3001\u5f8c\u3067\u8003\u3048\u308b\npub fn regread(regval: u8) -> i32 {\n    let retdata_h: u32;\n    let retdata_l: u32;\n\n    \/\/(1)CS\u30ec\u30b8\u30b9\u30bf\u306eTA\u30d3\u30c3\u30c8\u30921\u306b\u3059\u308b\u3002\n    spi_regs().cs.modify(spi::CS::TA::SET);\n\n    \/\/(2)CS\u30ec\u30b8\u30b9\u30bf\u306eCLEAR\u30d3\u30c3\u30c8\u306b0x03\u3092\u66f8\u3044\u3066TX-FIFO, RX-FIFO\u30af\u30ea\u30a2\n    spi_regs().cs.modify(spi::CS::CLEAR_TX::SET + spi::CS::CLEAR_RX::SET);\n\n    \/\/(3)FIFO\u306b\u9001\u4fe1\u30c7\u30fc\u30bf\u3092\u66f8\u304f\uff08\u9001\u4fe1\u30c7\u30fc\u30bf\uff1a\u30e9\u30a4\u30c8\u5bfe\u8c61\u306e\u52a0\u901f\u5ea6\u30bb\u30f3\u30b5\u306e\u30ec\u30b8\u30b9\u30bf\u5024\uff09\n    spi_regs().fifo.write(spi::FIFO::DATA.val(regval.into()));\n\n    \/\/(4)CS\u30ec\u30b8\u30b9\u30bf\u306eTXD\u30d3\u30c3\u30c8\u304c1\u306b\u306a\u308b\u307e\u3067\u5f85\u3064\n    while !spi_regs().cs.is_set(spi::CS::TXD) {}\n\n    \/\/(5)CS\u30ec\u30b8\u30b9\u30bf\u306eRXD\u30d3\u30c3\u30c8\u304c1\u306b\u306a\u308b\u307e\u3067\u5f85\u3064\n    while !spi_regs().cs.is_set(spi::CS::RXD) {}\n\n    \/\/(6)CS\u30ec\u30b8\u30b9\u30bf\u306eCLEAR\u30d3\u30c3\u30c8\u306b0x02\u3092\u66f8\u3044\u3066RX-FIFO\u30af\u30ea\u30a2\n    spi_regs().cs.modify(spi::CS::CLEAR_RX::SET);\n\n    \/\/(7)FIFO\u306b\u9001\u4fe1\u30c7\u30fc\u30bf\u3092\u66f8\u304f\uff08\u9001\u4fe1\u30c7\u30fc\u30bf\uff1a\u62bc\u3057\u51fa\u3059\u3060\u3051\u306a\u306e\u3067\u30c0\u30df\u30fc\u30670)\n    spi_regs().fifo.write(spi::FIFO::DATA.val(0x00));\n\n    \/\/(8)CS\u30ec\u30b8\u30b9\u30bf\u306eTXD\u30d3\u30c3\u30c8\u304c1\u306b\u306a\u308b\u307e\u3067\u5f85\u3064\n    while !spi_regs().cs.is_set(spi::CS::TXD) {}\n\n    \/\/(9)CS\u30ec\u30b8\u30b9\u30bf\u306eRXD\u30d3\u30c3\u30c8\u304c1\u306b\u306a\u308b\u307e\u3067\u5f85\u3064\n    while !spi_regs().cs.is_set(spi::CS::RXD) {}\n\n    \/\/(10)\u5f85\u3061\u7d42\u308f\u3063\u305f\u3089FIFO\u30ea\u30fc\u30c9\n    retdata_l = spi_regs().fifo.read(spi::FIFO::DATA);\n\n    \/\/(11)FIFO\u306b\u9001\u4fe1\u30c7\u30fc\u30bf\u3092\u66f8\u304f\uff08\u9001\u4fe1\u30c7\u30fc\u30bf\uff1a\u62bc\u3057\u51fa\u3059\u3060\u3051\u306a\u306e\u3067\u30c0\u30df\u30fc\u30670\uff09\n    spi_regs().fifo.write(spi::FIFO::DATA.val(0x00));\n\n    \/\/(12)CS\u30ec\u30b8\u30b9\u30bf\u306eTXD\u30d3\u30c3\u30c8\u304c1\u306b\u306a\u308b\u307e\u3067\u5f85\u3064\n    while !spi_regs().cs.is_set(spi::CS::TXD) {}\n\n    \/\/(13)CS\u30ec\u30b8\u30b9\u30bf\u306eRXD\u30d3\u30c3\u30c8\u304c1\u306b\u306a\u308b\u307e\u3067\u5f85\u3064\n    while !spi_regs().cs.is_set(spi::CS::RXD) {}\n\n    \/\/(14)\u5f85\u3061\u7d42\u308f\u3063\u305f\u3089FIFO\u30ea\u30fc\u30c9\n    retdata_h = spi_regs().fifo.read(spi::FIFO::DATA);\n\n    \/\/(15)CS\u30ec\u30b8\u30b9\u30bf\u306eDONE\u30d3\u30c3\u30c8\u304c1\u306b\u306a\u308b\u307e\u3067\u5f85\u3064\n    while !spi_regs().cs.is_set(spi::CS::DONE) {}\n\n    \/\/(16)CS\u30ec\u30b8\u30b9\u30bf\u306eCLEAR\u30d3\u30c3\u30c8\u306b0x03\u3092\u66f8\u3044\u3066TX-FIFO, RX-FIFO\u30af\u30ea\u30a2\n    spi_regs().cs.modify(spi::CS::CLEAR_TX::SET + spi::CS::CLEAR_RX::SET);\n\n    \/\/(17)CS\u30ec\u30b8\u30b9\u30bf\u306eTA\u30d3\u30c3\u30c8\u30920\u306b\u3057\u3066\u9001\u53d7\u4fe1\u5b8c\u4e86\u3002\n    spi_regs().cs.modify(spi::CS::TA::CLEAR);\n\t\t\n\ti32::from(i16::from_le_bytes([retdata_l as u8, retdata_h as u8]))\n}\n<\/code><\/pre>\n<\/div>\n
 <\/p>\n
\u4eca\u56de\u306f\u3053\u3053\u307e\u3067\u3002<\/p>\n
\u4eca\u56de\u3001\u30af\u30ec\u30fc\u30c8\u306e\u30a4\u30f3\u30bf\u30d5\u30a7\u30fc\u30b9\u3092\u3001<\/p>\n
\u30fbinit()\u95a2\u6570
\n\u30fbregwrite()\u95a2\u6570
\n\u30fbregread()\u95a2\u6570<\/p>\n
\u3068\u3057\u307e\u3057\u305f\u304c\u3001\u6b21\u56de\u306fspi_adxl345\u3078\u306e\u5236\u5fa1\u3092\u5b8c\u5168\u306b\u96a0\u853d\u3057\u3066\u3057\u307e\u3046\u3079\u304f\u5909\u66f4\u3092\u3057\u305f\u3044\u3068\u601d\u3044\u307e\u3059\u3002<\/p>\n
\u30fbinit()\u95a2\u6570\uff1aspi_adxl345\u3078\u306e\u521d\u671f\u5316\u3092\u5b8c\u5168\u306b\u7d42\u308f\u3089\u305b\u308b
\n\u30fbcurrent_acceleration()\u95a2\u6570\uff1aX, Y, Z\u8ef8\u306e\u52a0\u901f\u5ea6\u5024\u3092\u53d6\u5f97\u3059\u308b\uff08Main\u95a2\u6570\u3067\u8a08\u7b97\u4e0d\u8981\u306b\u3059\u308b\uff09<\/p>\n
\u305d\u308c\u304c\u7d42\u308f\u3063\u305f\u3089SPI\u306e\u3053\u3068\u306f\u4e00\u65e6\u5fd8\u308c\u3066\u3001Linux\u306e\u30cd\u30c3\u30c8\u30ef\u30fc\u30af\u6a5f\u80fd\u3092SOLID-OS\u304b\u3089\u4f7f\u7528\u3059\u308b\u3053\u3068\u3092\u8a66\u3057\u3066\u307f\u307e\u3059\u3002<\/p>\n
 <\/p>\n<\/div>\n<\/div><\/div><\/div><\/div>
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<\/div><\/div><\/div>","protected":false},"excerpt":{"rendered":"
(2023\/2\/13) \u524d\u56de\u66f8\u3044\u305f\u30b5\u30f3\u30d7\u30eb\u30d7\u30ed\u30b0\u30e9\u30e0\u3084\u8a18\u4e8b\u3092\u3001\u6709\u8b58\u8005\u306e\u65b9\u306b\u30c1\u30a7\u30c3\u30af\u3044\u305f\u3060\u304d\u307e\u3057\u305f\u3002 \u305d\u306e\u30d5\u30a3\u30fc\u30c9\u30d0\u30c3\u30af\u306e\u5185\u5bb9\u306b\u3064\u3044\u3066\u66f8\u304d\u307e\u3059\u3002 \u3055\u3089\u306b\u3001\u52a0\u901f\u5ea6\u30bb\u30f3\u30b5ADXL345\u5236\u5fa1\u90e8\u3092\u30af\u30ec\u30fc\u30c8\u5316\u3057\u3066\u304a\u3053\u3046\u3068\u601d\u3044\u307e\u3059\u3002  […]<\/p>\n","protected":false},"author":15,"featured_media":0,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[],"class_list":["post-6142","post","type-post","status-publish","format-standard","hentry","category-1"],"_links":{"self":[{"href":"https:\/\/solid.kmckk.com\/SOLID\/wp-json\/wp\/v2\/posts\/6142","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/solid.kmckk.com\/SOLID\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/solid.kmckk.com\/SOLID\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/solid.kmckk.com\/SOLID\/wp-json\/wp\/v2\/users\/15"}],"replies":[{"embeddable":true,"href":"https:\/\/solid.kmckk.com\/SOLID\/wp-json\/wp\/v2\/comments?post=6142"}],"version-history":[{"count":0,"href":"https:\/\/solid.kmckk.com\/SOLID\/wp-json\/wp\/v2\/posts\/6142\/revisions"}],"wp:attachment":[{"href":"https:\/\/solid.kmckk.com\/SOLID\/wp-json\/wp\/v2\/media?parent=6142"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/solid.kmckk.com\/SOLID\/wp-json\/wp\/v2\/categories?post=6142"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/solid.kmckk.com\/SOLID\/wp-json\/wp\/v2\/tags?post=6142"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}