{"id":3191,"date":"2018-07-02T15:55:42","date_gmt":"2018-07-02T06:55:42","guid":{"rendered":"https:\/\/solid.kmckk.com\/SOLID\/?p=3191"},"modified":"2019-05-22T12:59:57","modified_gmt":"2019-05-22T03:59:57","slug":"%e3%83%ab%e3%83%8d%e3%82%b5%e3%82%b9%e3%82%a8%e3%83%ac%e3%82%af%e3%83%88%e3%83%ad%e3%83%8b%e3%82%af%e3%82%b9-r-in%e3%82%b3%e3%83%b3%e3%82%bd%e3%83%bc%e3%82%b7%e3%82%a2%e3%83%a0%e3%83%95%e3%82%a9-2-2-7","status":"publish","type":"post","link":"https:\/\/solid.kmckk.com\/SOLID\/archives\/3191","title":{"rendered":"\u300c\u30a4\u30f3\u30c6\u30eb\u00aeFPGA\u30c6\u30af\u30ce\u30ed\u30b8\u30fc\u30fb\u30c7\u30a4\u300d \u306b\u3066\u8b1b\u6f14\u30fb\u5c55\u793a\u3092\u884c\u3044\u307e\u3059"},"content":{"rendered":"<h4><strong>\u30a4\u30f3\u30c6\u30eb\u00aeFPGA\u30c6\u30af\u30ce\u30ed\u30b8\u30fc\u30fb\u30c7\u30a4<\/strong><\/h4>\n<p>\u306b\u3066\u8b1b\u6f14\u30fb\u5c55\u793a\u3092\u884c\u3044\u307e\u3059\u3002<\/p>\n<p style=\"text-align: left;\">\u25a0\u8b1b\u6f14\u5185\u5bb9(\u8b1b\u5e2b\uff1a\u8fbb\u90a6\u5f66\u3000\u8b1b\u6f14\u6642\u9593\uff1a11:30\uff5e12:30 \u30e9\u30f3\u30c1\u30bb\u30c3\u30b7\u30e7\u30f3)<\/p>\n<ul>\n<li style=\"list-style-type: none;\"><strong>\u300cCPU\/FPGA\u3092\u30d5\u30eb\u6d3b\u7528! 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